Re: NMI on PCI

[Tom Keaveny <tak@rtl.rose.agilent.com>]

hi bob,

	perr#  is "parity error", and relates to data protection during
bus transactions.  the response to this varies by motherboard, PCI i/o gizmo,
and opsys and driver.

	serr#  is "system error", and if it is hooked up on your system,
will often cause a high-priority-interrupt (and may be mapped to NMI)

==
tom

> 
> Back in the good old ISA days (x86 architecture), I used to connect a
> wire to pin A1 in an ISA slot and run it through a push-to-ground
> switch to generate an NMI for which my debugger would be listening. 
> This is a great way to break into an otherwise dead system in an
> attempt to figure what went wrong.
> 
> Recently, I bought a motherboard with no ISA slots, so I'm trying to
> figure out how to do this in a PCI slot.  I have found pin B40
> (PERR#) which looks like in might do the trick, but I'm not an
> engineer, so I'm asking you folks.
> 
> 1.  Is there any harm to the system or PCI card in attaching a
> push-to-ground switch onto an (active) PCI slot?
> 
> 2.  Might this actually generate a Parity Error (NMI - INT 02h)?
> 
> 3.  If not, how else might I accomplish this?
> 
> 4.  Are there any PCI cards on the market which have such a
> capability built in?
> _______________________________________________________________
> Bob Smith - bsmith@sudleyplace.com - http://www.sudleyplace.com
> a.k.a.      bsmith@qualitas.com    - http://www.qualitas.com
> 
>