Re: Bridge versus Simple Device

[James Murray <jmurray@triscend.com>]

Milan

Yes, I understand that there is a big difference between a BRIDGE and a
PCI-TO-PCI BRIDGE. That is not what I am asking.  The PCI spec (pg 41 and 42)
talks about a "Simple Device" and a "Bridge" and makes the distinction around
the fact that a Bridge does post outbound memory writes, whereas a Simple Device
does not.

If I have an ASIC that connects 2 busses together, the PCI bus and a local bus
(on which resides a CPU), do all the rules that apply to bridge ordering (pg 42
PCI spec), apply on the local bus side too? Another way of asking the question
is, Do the Master and Target state machines have to be inter-dependent ?

My idea was to not allow multiple write command posting for PCI master
transactions. For example, the CPU would setup a DMA to move data to the PCI
master write data fifo. When the PCI Master state machine has completed the PCI
transaction, it will interrupt the CPU to let the CPU know that the transaction
has completed on the PCI bus. At this time, the CPU can issue a new PCI master
transaction. The point is that the CPU will NOT assume that a transaction has
completed on the PCI bus before it actually has completed (as opposed to it
being posted in the local fifo). If I did all of this, I assume I could be
called a "simple Device" from the PCI spec point of view.

The email response I got from "jcappello@optimal-design.com" seems to indicate
that I can do "whatever I want" really on the local bus side of the ASIC.
However, if I use the "producer-consumer model", discussed in the "Mindshare PCI
Sytem Architecture" text, I will run into the same deadlock problems  as a
PCI-to-PCI bridge if I am not careful.

Thanks for the input so far. It helps to get more than one perspective. Some of
these spec issues are rather tricky.

James

Horkel Milan wrote:

> It is important to consider what is BRIDGE and what is PCI-TO-PCI BRIDGE
>
> PCI-TO-PCI BRIDGE connects PCI bus with another PCI bus and gives the system
> HOST ability to enumerate secondary PCI bus devices and the ability to
> configure them. For this functionality PCI-TO-PCI BRIDGE have different set
> of PCI configuration registers (TYPE 01).
>
> Generic BRIDGE do not have this ability. It have standard set of PCI config
> registers (TYPE 00). PCI system (HOST processor with lets say PCI BIOS) do
> not know anything about what is behind that bridge. BRIDGE can be
> MASTER/TARGET or TARGET-ONLY device.
>
> Milan Horkel
> DECROS
> HW Development
>
> -----Puvodni zprava-----
> Od: James Murray [mailto:jmurray@triscend.com]
> Odeslano: 27. unora 2001 0:43
> Komu: PCI SIG
> Poedmit: Bridge versus Simple Device
>
> I have an application (ASIC) where I have an embedded processor on a
> "local" bus containing various other local bus masters and targets. I
> want to design a PCI bus master/target interface that will reside on
> this local bus.
>
> Here is the dilemma:
> I would really like to consider this ASIC as being a PCI "Simple
> Device", as opposed to a "Bridge", purely because of the reduced
> complexity of the Simple Device Ordering rules. On one hand, the spec
> says that in general, if a processor is residing behind the PCI bus
> interface, the device is considered to be a Bridge. If memory writes are
> posted, the device is classed as a Bridge.
>
> Question: If I use an internal DMA engine to move data into a Mater
> Write FIFO, and generate an IRQ to the processor WHEN THE TRANSACTION
> COMPLETES ON THE PCI BUS,  could I then call myself a "Simple Device" ??
>
> Thanks in advance for any input.
>
> James