Re: Programmable BARS

["Weng Tianxiang" <wtx@umem.com>]

Hi James,
This is a protocol question:
You, as a hardware designer, allocate BARx for each function with a certain
amount of memory. After that, software running on any machine with your card
inserted and trying to have access to your board has to comfort to what you
have defined for BARx.
For example, you allocated BAR3 as funtionXXX, the software that wants to
access to your function XXX must access BAR3 to get where memory allocated
to this function is.

No other way to let other software that are unknow of your allocation to use
your function.

Weng Tianxiang
Micro Memory Inc.
9540 Vassar Av.
Chatsworth, CA 91311
Phone: 818-998-0070, Fax: 818-998-4459


----- Original Message -----
From: James Murray <jmurray@triscend.com>
To: PCI SIG <pci-sig@znyx.com>
Sent: Wednesday, March 14, 2001 11:38 AM
Subject: Programmable BARS


> Hello
>
> I was thinking of using 6 memory BARS in an ASIC, and having the
> capability to "map" each one these BARS to one of 8 possible application
> memory targets.  The number of BARS implemented and the memory area to
> which the BARS are assigned will depend on the particular application of
> the ASIC.
>
> My question is: If I implement such a scheme, how does an external bus
> master know which BARS correspond to what areas in my application? Since
> the BARS are not fixed relative to one another, I cannot see how this
> will work, if at all?
>
> Is my scheme not valid or am I missing something?
>
> Any help would be greatly appreciated.
>
> James Murray
>
>