RE: Programmable BARS

[Addison Chen <addison@netconvergence.com>]

I don't know if this will help, but it is the job of the BIOS to assign each
BAR for each PCI device.  IT is the job of the device-driver (which
indirectly controls the bus master) to know the order of the BAR and how
each BAR is getting used.  First, the device-driver decodes whether or not
this PCI device is what it is suppose to look at; this is done by looking at
the VENDOR ID and DEVICE ID.

-Addison


-----Original Message-----
From: James Murray [mailto:jmurray@triscend.com]
Sent: Wednesday, March 14, 2001 11:38 AM
To: PCI SIG
Subject: Programmable BARS


Hello

I was thinking of using 6 memory BARS in an ASIC, and having the
capability to "map" each one these BARS to one of 8 possible application
memory targets.  The number of BARS implemented and the memory area to
which the BARS are assigned will depend on the particular application of
the ASIC.

My question is: If I implement such a scheme, how does an external bus
master know which BARS correspond to what areas in my application? Since
the BARS are not fixed relative to one another, I cannot see how this
will work, if at all?

Is my scheme not valid or am I missing something?

Any help would be greatly appreciated.

James Murray