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RE: Arbitration pin requirements
>Dilemna: I would like to build a PCI arbiter in a part that does not
>have PCI-compliant I/Os. Is this possible, given that the arbitration
>signals are point-to-point, or do the pins have to be PCI compliant.
Yes, they must be PCI compliant. REQ# and GNT# are PCI signals and are
expected to comply with the electrical PCI specs. In fact they are even
called out in the electrical chapter of the Spec.
Just because an ASIC or IC vendor doesn't call an I/O "PCI-compliant",
doesn't mean that it isn't. It might be. The 5V PCI specifications are
basically TTL compatible, as far as the voltage levels and thresholds are
concerned. There is a range of TTL-compatible drive strengths (output
impedance or current levels), and not all of them are suitable for driving
PCI. Compare the vendor's min and max specs against the PCI specs, and you
might find a match.
For PCI (but not PCI-X), the PCI Spec allows a wider range of drive
strengths for REQ# and GNT# drivers. See the footnotes below Tables 4-2,
4-4, and 7-2.
>I would think that as long as you're TTL-level compliant on REQ and
>you should be ok. Same story with CLKs, if you're running them
I might agree with you on the CLKs, but not REQ# and GNT#. "TTL-level
compliant" implies a very wide range of drive strengths, and some are
unsuitable for driving an unterminated point-to-point net.
As inputs, they must have the required clamping characteristics too.
Keep in mind that REQ# and GNT# have the most critical timing requirements.
You can't afford to fudge them and then have to wait extra nanoseconds
(i.e., cut the CLK speed way back) for them to settle.
The PCI electrical specs basically regulate PCI component (ICs) that might
be used in various systems. REQ# and GNT# pins are found on PCI components.
CLK input pins are found on PCI components. CLK output pins are not,
generally speaking. They are found on clock drivers that are chosen for
particular platforms (motherboards). You can't unplug one from one system
and plug it into another. Which is why they are excluded from meeting the
same specs (see footnotes to the Tables mentioned above). On the other
hand, they do need to meet the minimum requirements in Sections 188.8.131.52 or
184.108.40.206, and the system (motherboard) designer is responsible for meeting
(And the CLKs should always be point-to-point, not bussed.)