[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

CPLD for implementing Arbiter

To: pci-sig@znyx.com
Subject: CPLD for implementing Arbiter
From: Jeff Siegel <jeff@optosphere.com>
Date: Wed, 28 Mar 2001 11:52:01 -0800
Cc: PCI SIG <pci-sig@znyx.com>
References: <212CC57E84B8D111AD780000F84AA0490C713DB8@mroexc2.tay.cpqcorp.net>
Sender: owner-reflector@www.pcisig.com

Hello all,

I am looking for a recomendation for a CPLD to implement a PCI Arbiter. I would
like to use Xilinx XC9500XL family (a 3.3V CPLD) Has anyone used this part
before for this function? Anyone have VHDL code for an arbiter they are willing
to share?

Jeff Siegel
jeff@optosphere.com

References:
- RE: Arbitration pin requirements
  - From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>

Prev by Date: RE: bridge heirarchy
Next by Date: Initialization Phase versus Run Time Phase
Prev by thread: RE: Arbitration pin requirements
Next by thread: Arbiter Question, IRDY#, FRAME#
Index(es):
- Date
- Thread