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Re: Initialization Phase versus Run Time Phase
Hi,
My suggestion is:
You may separate Configuration registers from your other design and make it
available after system normal reset time.
After reset time, you configuration part receives all needed system
information and you may delay any memory transactions with retry response
until your main part is initialized.
Separation of Configuration part from your main design is not very difficult
thing, but you win a long reset time for your system.
Weng Tianxiang
wtx@umem.com
wengtianxiang@yahoo.com
Micro Memory Inc.
9540 Vassar Avenue
Chartsworth, CA 91311
Tel: 818-998-0070
Fax: 818-998-4459
----- Original Message -----
From: James Murray <jmurray@triscend.com>
To: PCI SIG <pci-sig@znyx.com>
Sent: Wednesday, March 28, 2001 11:48 AM
Subject: Initialization Phase versus Run Time Phase
> Hello
>
> I have an ASIC which could potentially require a relatively long time (3
> seconds) to initialize itself before being ready for access from an
> external bus master.
>
> After PCI RST is deaseerted, my device will assert an automatic "Retry"
> if accessed before my PCI config registers have been configured
> correctly (loaded from EEPROM for example).
>
> My first question is: Can I assert this "retry" for up to 1 second,
> (2^25 PCI clocks) without any side effects?
>
> After the 1 second period elapses, the system is now in "Run-time"
> phase, however, my device is still not ready to be accessed, since it
> has other initialization tasks that take a long time to complete. If I
> am now accessed by a PCI bus Master, I could Retry it again, but the
> spec says that for Mmeory Write, I need to accept at least 1 data phase
> within 10usecs after the first retry. (Section 3.5.3)
>
> How do I "hold-off" external bus master acccess to my device until I am
> ready to accept them? Is it reasonable for me to implement a "Ready"
> register that can be accessed after initialization, that will indicate
> that I am not ready to external bus masters? If not, any suggestions?
>
> Regards
>
> James
>
>
>