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Re: why Target cannot change its mind
Yes, that's section 3.2.1, page 26, last paragraph:
"The source of the data is required to assert its xRDY# signal
unconditionally when data is valid . . ."
and by the way, some extra support for the answer to the subject
line can be found on the next page (27) at the top:
"Once a master has asserted IRDY#, it cannot change IRDY# or FRAME#
until the current data phase completes regardless of the state of TRDY#.
Once a target has asserted TRDY# or STOP#, it cannot change DEVSEL#,
TRDY#, or STOP# until the current data phase completes. Neither the
master nor the target can change its mind once it has committed to the
current data transfer until the current data phase completes."
Note that these restrictions apply to STOP#, DEVSEL#, and FRAME# as well.
Richard Iachetta wrote:
> >No - I think the master and target both have the same kind if restriction.
> >The master is committed once it asserts IRDY# and the target is committed
> >once it asserts TRDY#.
> Also, I think there is a requirement in PCI that says that masters and
> targets are not allowed to condition their assertion of xRDY based on the
> other guy's xRDY, i.e. a target cannot wait for the master to assert IRDY
> before asserting TRDY and vice versa. I didn't look it up but I seem to
> remember it.
> Rich Iachetta
> IBM Microelectronics Division -- Austin
> World Wide Field Design Center
> Phone: 512-838-6305 Tie Line: 678-6305