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PCIX split completion DWORD with req64 asserted




I need some clarification on split completion transactions.  It appears
that the PCIX spec explicitly does not disallow the scenario below.

Two 64-bit bus width devices M and T.
- M generates an IO read command at address 0x04 (DWORD read by
definition).
- T responds with a split response (no data transferred)
- T then generates a split completion transaction
	address is 0x00 (required address change for DWORD commands)
	byte count is 4
	REQ64 is asserted (doesn't make any sense but it is allowed)
	ad[31:0] is the data requested by the original IO read transaction
	ad[63:32] is unknown/garbage
- M accepts the split completion, and the transaction is complete.

  My questions are:
1) why does PCIX allow REQ64 to be asserted on a split
completion of a DWORD command instead of requiring it to be a 32-bit
access instead?
2) And did I get my assumptions correct in where data is valid when
req64 is asserted on a split completion resulting from a DWORD
command (i.e. which half of the bus contains the return data)?


-- 
-- Neal Palmer

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