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Purposeful Parity control RE: PCI Politics (was RE: why Target cannot change its mind)
> Why was the parity control necessary for a chip-to-chip bus?
For the same reason it's necessary in other reliable, high-speed data
transfer mechanisms - it is very easy for single bit errors to sneak in, be
they due to design margin, bad components, external influence, or whatever,
and without some bandwidth-efficient, cost-effective detection method, a
single bit error could easily run undetected for a while and worm its way
into causing system instability.