RE: PCI Politics (was RE: why Target cannot change its mind)

[Alan Deikman <Alan.Deikman@znyx.com>]

>From: "Austin Franklin" <austin@darkroom.com>

>I have every idea how to get the signaling of PCI at 33MHz.  It is not the
>PCI signaling that makes it difficult to be done outside of an ASIC.  It is
>some of the cycle to cycle timing.  Initially designing PCI without certain
>cycle to cycle timing constraints (basically too much logic between cycles)
>would have made a negligible impact on performance.

Are you talking about the parity checking, or something else?  What would
you change, and how would it strike a better balance between the utility
of PCI and the ability of letting "the little guy" in the door?


> > The days of just slapping
> > some CMOS gates on a connector and whomping up a new
> > peripheral board are long gone, my friend.  Where have you
> > been?
>
>Where have I been?  Designing (over 50) PCI interfaces since its inception.

It sounds like you've been around a while, then.  I suspect you
miss the days when a little company like Hercules could make
a fortune on the graphics board business or AST & QuadRAM
do their thing with memory cards and the like.  All with a
four-layer fab (often with rework on it) and a handful of SSI.

I can see your point that the investment bar is higher for
a PCI design than an ISA/EISA/VLbus/whatever design because
of the ASIC requirement.  Where I would differ is that the
bar was not above the heads of a small company.  It was above
the heads of a couple of guys horsing around with circuits
in the garage.

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Alan Deikman        | 510 249 0800 Voice
ZNYX Networks, Inc. | 603 843 5867 FAX