Re: RE: VIO pin connection

[m.erber@avm.de]

Hi,
Theoretically definitely right.

Practically, sometimes motherboards are lying about there used signalling
environment.
On motherboards shipped today (don't name a vendor) you can see (measure)
that the signalling level the chipset uses is 5 Volt (probably to be
'compatibel'
with existing 5 Volt only PCI cards) but in contradiction the Vio Pin on
the slot
is saying that the signalling level should be 3.3 Volt.
This also leads to additional clamping current you mentioned, because the
asic
assumes it should clamp to the 3.3 Volt Vio rail.

What do you think of this ?

Regards,
Mat.



                                                                                                                                     
                    "Ingraham, Andrew"                                                                                               
                    <Andrew.Ingraham@c        An:     "'Raj Gandhi'" <raj.gandhi@qlogic.com>                                         
                    ompaq.com>                Kopie:  "'pci-sig@znyx.com'" <pci-sig@znyx.com>                                        
                                              Thema:  RE: VIO pin connection                                                         
                    19.04.2001 14:11                                                                                                 
                                                                                                                                     
                                                                                                                                     




>   Are there any issues if we always clamp inputs
>   to 5v by connecting VIO of an ASIC to 5v rail
>   instead of VIO.

Yes.

If you plan to use this ASIC in both 3.3V and 5V Signaling Environments,
then the clamping MUST change, based on the current environment into which
the card (presumably this will go on a plug-in PCI card) is plugged.

In the 3.3V environment, if the inputs do not clamp starting above 3.3V,
then it does not comply with the PCI specs.  See "Ich" in Table 4-4, where
"Vcc" is the +3.3V supply in this case.

The only way to tell which environment a card is plugged into, is with the
+VIO pins on the connector.

Presumably, the only way your ASIC can tell which type of clamping to use,
is with its +VIO pins.

If the ASIC's +VIO pins are not connected to the PCI connector's +VIO pins,
then the ASIC won't know which environment it is being used in, and its
overshoot clamping would be incorrect.

Regards,
Andy