RE: Fw: why Master/Target cannot change its mind

[Richard Walter <rwalter@brocade.com>]

From: Wen-King Su [mailto:wen-king@myri.com]

<snip>

> Remember, target cannot wait for IRDY#
> to be asserted as a pre-condition to its asserting TRDY#.

Not quite.  This is true only for reads, not for writes.

The actual requirement is that the source of data (initiator for writes, target for reads), cannot make his xRDY# dependent on the assertion of the other xRDY#.
However, the recipient of the data *can* delay his xRDY# pending the other.

In fact, this is required to make deferred writes work.  The target waits for the initiator to assert IRDY#, samples the data lines (which he knows is valid due to IRDY# assertion), then asserts STOP# to retry the transaction without officially accepting the write data.  (After the deferred write has been done on the back end and  the initiator retrys the transaction, the target will assert TRDY# to formally accept the cycle, but that doesn't include the target waiting for IRDY# before asserting TRDY#.)

However, from a practical standpoint, unless you need to support deferred writes, there is no particular reason for a target to make TRDY# assertion dependent on IRDY#... (But it is not illegal)

-Richard Walter
Senior Hardware Engineer
rwalter@brocade.com
Note: I speak for myself, not for Brocade.