32 bit PCI, Byte Lanes

["Xavi Neuri" <xcano@neuricam.com>]

Hello,
I am working on a 32 bit PCI target . The fact is that the device works with
16 data bits and I have no
idea which device (HOST/Bridge) impose the number of enable bytes in any
transfer. To fit
the bandwith it would be better use 32 bits data transfers and then, unpack
the Dword inside the device
in two words, but I don't know who is responsible or if is possible to force
the transfer to work with 32 or 16
bits or is the bridge at his own who manage it.

Thank you

Xavier Cano