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Re: Endian Mapping
It solves the problem of being able to write a single byte to the same
location from both busses.
It does not solve the problem of wanting to read and write an integer
from both busses (not a 32-bit chunk of data, but a 32-bit integer). This
is a problem that is virtually impossible to get correct under all
circumstances, and it requires the hardware to understand the context of
all accesses (as to whether it is 32-bits of data being moved, and
shouldn't be endian swapped, or if it is an integer that should be endian
On Thu, 21 Jun 2001, Amit Shah wrote:
> Hi all,
> One of our customers is using a Power PC system. What he is trying to do
> is trying to use our PCI device on that system.
> And to do so, he is connecting addr 0 of our PCI chip (little endian) to
> addr 31 of his Power PC (Big endian) system and
> so on for all data[31:0] and cbe[3:0] lines.
> Does this type of approach work ?
> Does this really solve big endian to little endian mapping ?
> Amit Shah
-- Neal Palmer
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