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Maximum Outstanding Split Transactions in PCI-X Configuration Control and Status Registers
For the fields "Designed Max. Outstanding Split Transactions" in PCI-X
Status Register AND
"Max. Outstanding Split Transactions" in PCI-X Control Register..
Do the fields refer to the max Split transactions supported by device when
it is a target or when it is the initiator? I need to know what to set in
the Status Register field for my device.
My device has both target and initiator. The target does not terminate a
transaction with split.
As initiator, I issue only Memory Read commands, which can be split. I have
5 independent sources of Memory Read requests. I have internal resources to
save Tag Nos and other transaction details for upto 5 split transactions.
So, what do I set in the Status field?
Any inputs for helping me understand these fields would be appreciated.
IDT Dallas Design Center,