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RE: PCI bridge I/O space
The BIOS is broken, plain & simple.
There is no requirement to assign 8K of I/O space to a bridge. In
fact, bridges are not even required to support any I/O forwarding
and can leave their I/O Base & I/O Limit registers as read-only 0's
to not support them.
It is true that the I/O Base & I/O Limit register only have a 4K
granularity, so that whatever window is assigned for the I/O space
that sits behind the bridge must be a multiple of 4K in size.
However, it is possible for both the I/O Base & I/O Limit to be
set to the same value, resuling in a 4K window.
Or for the I/O Base to be set higher than the I/O Limit which will
disable all I/O forwarding. (See PCI-to-PCI bridge spec 1.1,
section 18.104.22.168, paragraph 4, page 41.)
Secondly, even if the BIOS tries to assign I/O space and it runs
out of room such that it can't honor all of the allocations that
it wants to, then it still ought to boot. It should just disable
the devices that it thinks it can't allocate and continue to run.
By not booting, something else is broken.
Bottom line: The BIOS is broken. The vendor ought to fix this problem
and you should be able to find at least some other BIOS that doesn't
have this same bug.
Senior Hardware Engineer
Brocade Communications Systems
Note: I speak for myself, not for Brocade Communications.
From: Kit Richards [mailto:firstname.lastname@example.org]
Sent: Friday, October 26, 2001 9:23 AM
Subject: PCI bridge I/O space
I am trying to put together a Intel cPCI system with 10 DSP
boards. The board manufacturer put three PCI bridges on each board.
Evidently, by the PCI spec, the x86 bios assigns 8k of i/o space to
each board even though the boards don't request any i/o space.
The system won't boot with more than 3 boards.
The manufacturer is trying to find a cPCI single board manufacturer that
will modify its bios to not assign i/o space automatically to all bridges.
Is anyone familiar with this problem? Is there a way around
it? Do you have any ideas or suggestions?