RE: query

[Richard Walter <rwalter@brocade.com>]

Rajesh,

One other point, by "whenever master gives interrupt acknowledgement", I
hope you mean "Whenever S/W reads my interrupt status register" (Which is
the register that Weng advises in point 1 below and which is located in
memory space as an offset from one of your BARs) and *not* "When I see an
interrupt acknowledge cycle (CBE = 0000 during address phase) on the PCI
bus".

Only the system interrupt controller should respond to interrupt acknowlege
cycles on the PCI bus; all other devices should provide an interrupt status
register which driver software can read.

-Richard Walter
Senior Hardware Engineer
Brocade Communications Systems
rwalter@brocade.com
Note: I speak for myself, not for Brocade Communications.


-----Original Message-----
From: Weng Tianxiang [mailto:WTX@umem.com]
Sent: Friday, December 21, 2001 8:03 AM
To: pci-sig@znyx.com
Subject: RE: query



Hi Rajesh,
1. Design a set of internal interrupt bits representing all internal
interrupts for hardware.
2. Before asserting nINTA, set internal interupt bits in hardware;
3. After receiving interrupt, Software driver located on system reads
the internal interrupt bits and analyze what was happening.

Weng

-----Original Message-----
From: venkat v [mailto:venky_lt@rediffmail.com] 
Sent: Friday, December 21, 2001 5:14 AM
To: pci-sig@znyx.com
Cc: pci-sig-request@znyx.com
Subject: query



Sir,
I would like to know, how to use inta in pci.
In my application,I need to use single function.
whenever master gives interrupt acknowledgement for my assertion of
inta, how to serve this. can I use multiple internal interrupts to map
to Inta#.

Advance thanks for ur advice.

Rajesh.
Design Engineer