21154BE Bridge trouble; Found problem -- fault in our design!

[Mike Dini <mdini@dinigroup.com>]

Here is a description of what happened with the
21154be:

We are running a 32-bit PCI target in a board designed for a 64-bit PCI
bus. The design is in an FPGA with all of the PCI signals connected
(including REQ64#). We had a couple of signals not on fixed pins, and one
happened to land on REQ64#, and it was driving it to random
values.

The 21154 should drive REQ64# during it's accesses. Our design was also
driving REQ64# during the 21154's accesses (causing contention that
virtually always ends up with a low signal == active). Bad things
happened and the 21154 got confused and sent bad transactions to our
design. So we kinda screwed up the transactions.  But one question
is: why is the 21154 using REQ64# as an input signal when it is driving
it? The PCI spec forbids using an input signal when driving it (for
timing reasons). 

We are rechecking now to see if the 21154BC behaves differently in this
anomalous environment.  Perhaps the differences can help explain why
others are having trouble with the BE parts.

Mike Dini