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Re: PCI clock distributuion..
With clocks, it is almost always best, if not essential, that you not daisy-chain them. There can be ways around this, and it certainly depends on edge rates and topology; but it's usually best to start with enough fanout so you have one clock copy per device.
One of your (many) choices, would be to take the SBC's PCLK and fan it out using a clock buffer. With two copies, you could drive separate clocks to the two PPBs (PCI-PCI Bridges); it seems silly to add a third PPB just to replicate the clock. Or, if the SBC has a PCLK input, you could start with your PCLK source on the system board and fanout three copies, one for the SBC and one for each PPB. This has an advantage in controlling the skew between SBC and PPB clocks.
PPBs may vary, but the few I've seen (Intel's) include an internal clock fanout for the secondary side. But this clock fanout is optional! There is no reason why you must use it; and it works quite well to do your own clock fanout external to the PPB, as long as you observe the timing and skew relationships (see the PPB chip's specs). These PPBs do not use synchronizers, so the two sides can't be totally asynchronous with one another.
So yet another option, would be to have a clock buffer(s) with enough copies to drive both the PPBs and your eight slots.
You can get clock buffers either with or without a PLL. Without a PLL, the buffer has a few nanoseconds of delay between input and output, but it is relatively immune to frequency changes or stopped clocks. With a PLL, the buffer can have "zero" effective delay (or somewhat positive or negative), but it wants to see a constant clock frequency and clocks that never stop or jitter.
Regarding number of PCI loads ... PCI does not limit you to eight or 10 loads, or four or five slots, or whatever you may have been told. These are guidelines only, and careful engineering, and/or changing the bus frequency, can extend the bus to more loads.
Having eight slots may be do-able with only one PPB, by connecting some of the slots to the primary side of the PPB, in common with the SBC.
If the SBC is the source of your PCI clocks, then it must be in a unique slot that no other PCI card can occupy. With that in mind, it might be acceptable to continue using the reserved pin (as long as the customer can't cause permanent damage by plugging things in wrong).