Re: PCI clock distributuion..

[Andrew Ircha <api@art-render.com>]

Andy,

Thanks for that. I wonder if you can put more flesh on the platform
loading issue. The spec. does talk about expasion card loading of up to
10pF per shared signal, and nothing, as you say, on motherboard loading.
With the connector loading, four slots is looking like the limit of
characterised drive capability of a PCI output device. I suppose 10pF
looks a bit heavy today (5 - 6pF is probably more typical for BGA/TQFP
devices), but have you ever seen any 8+ slot designs? Did they have to
reduce PCLK? I have to admit, I'd assumed the 10 load rule through
hearsay.

Andrew Ircha

> Regarding number of PCI loads ... PCI does not limit you to eight or 10 loads, or four or five slots, or whatever you may have been told.  These are guidelines only, and careful engineering, and/or changing the bus frequency, can extend the bus to more loads.