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RE: PCI Configuration BAR all '1' write

> However, software better not do this while the PCI interface
> is operational - if a third master tries to access address 0x1234,000
> right after this master writes it to 0xffff,ffff, the slave 
> won't respond.
> The method Amit describes is the common way of doing things.
> Usually, another software driver won't try to access the BAR's in
> this manner.   It's not unreasonable to expect the initial master to
> construct a table of memory sizes, if other masters need this 
> info, I think.

I don't know *why* certain things are done a certain way on the OS level, but we once captured all the accesses to the BAR's of our chip during bootup to Windows. They get accessed (and thus rewritten) at least 3 times. But this isn't really a problem, if only because the OS itself will dictate when other drivers will get permission to execute...


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