Does anyone know how Xilinx bitgen's /Gclkdel for 66MHz PCI works?

["Kevin Brace" <kevinbraceusenet@hotmail.com>]

I will like to know if there is anyone who can explain to me how Bitgen's 
(Xilinx tool to generate a bit stream file) /Gclkdel option works.
This is an option Xilinx uses for 66MHz PCI in 
Virtex/Virtex-E/Spartan-II/Spartan-IIE, but it seems like a guarded secret.
If someone can explain to me how this feature works, drop me off an E-mail.



Thanks,



Kevin Brace

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