pcix - NS when CPU has a lock in force

[Zehra Rizvi <zehra@and-or.com>]

Can somebody please clarify why the NS-bit is always cleared to zero in 
split completion transactions. I ask this because:

1. Having established a lock, a Host/PCI-X bridge will accept only split 
completion transactions moving to the processor.
2. many processors cannot snoop their caches while performing a locked 
transaction series, during which only the transactions with NS-bit 
set(indicating that snooping is not necessary) are accepted by the 
host/pcix bridge.

Thanks.