RE: PCI Clock

["Clark, Raymond J (WBST)" <Raymond.Clark@usa.xerox.com>]

Perhaps you should not give up quite yet.  A few years ago when people were
just beginning to use spread-spectrum clocks there was alot of discussion on
this subject.  As I remember the behavior of the frequency variation was
crafted to be such that the PLL could follow it, and the PLL crafted to be
able to.

I would still be concerned about meeting timing due to round-trip delay, but
that is another issue.

I would suggest that you look at the archive at
http://www.pcisig.com/reflector/maillist.html, but as I look, there does not
appear to be any search or bulk download capability - just the ability to
plow through all eight years of messages one page at a time!  Hopefully I am
missing something.

[1] Can anyone elaborate on my technical comment regarding PLLs and
spread-spectrum clocks in PCs?

[2] Are the archives available in a more accessible form?  They used to be
in zip files, which I used to download and write scripts to search locally
when I was working in this area.

--Ray Clark
Xerox


-----Original Message-----
From: Bearzi, Anthony [mailto:abearzi@harris.com]
Sent: Thursday, April 11, 2002 8:13 AM
To: 'Heiner, Andreas'; pci-sig@znyx.com
Subject: RE: PCI Clock


OK I am already  convinced that this approach is not compliant and will not
work
in a PC using spread spectrum clocking. The PLL will probably never lock in
this
type of system.

-----Original Message-----
From: Heiner, Andreas [mailto:HeinerA@Becker.de]
Sent: Thursday, April 11, 2002 7:45 AM
To: pci-sig@znyx.com
Subject: AW: PCI Clock


Hello Tony,

This is only allowed in an embedded system. Because of the clock spec it is
not possible to use a PLL or DLL directly at the clock (for example think
about spread spectrum clocks used in nearly each newer PC).

Andreas Heiner

-----Ursprüngliche Nachricht-----
Von: Bearzi, Anthony [mailto:abearzi@harris.com] 
Gesendet: Donnerstag, 11. April 2002 13:39
An: 'v_arv@lycos.com'; pci-sig@znyx.com
Betreff: RE: PCI Clock

Use a PLL based clock distribution circuit with adjustable feedback loop. In
a
nutshell you adjust the trace length of the feedback loop to match the
distance
between the clock output and the destination. If you do this correctly you
will
see that the wave front arrives at the destination within specification. You
are
using the device as a delay line. I have used the Texas Instruments CDCxxx
family of devices in an embedded PCI application and it worked very well. I
welcome feedback from the group with respect to how this may impact PCI
compliance.

Tony Bearzi

-----Original Message-----
From: arvind v [mailto:v_arv@lycos.com]
Sent: Thursday, April 11, 2002 3:36 AM
To: pci-sig@znyx.com
Subject: PCI Clock


Hi All,

In one of my designs in Processor  pmc form factor, I need to run pci
clock(66MHz) to processor for trace length more than 7 inches (limitation of
the
design). 

As per PCI Specs , on an expansion board I can run only 2.5 inches.

What are the implications of this long length , any ideas to over come?

Thanks in advance
Arvind.


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