RE: PCI Clock

["Ingraham, Andrew" <Andrew.Ingraham@compaq.com>]

> [1] Can anyone elaborate on my technical comment regarding PLLs and
> spread-spectrum clocks in PCs?
 
PLLs are allowed for 66MHz PCI operation in accordance with chapter 7
of the PCI Spec.  Not only must (non-spread-spectrum) clock changes
in 66MHz mode be accompanied by a Reset (to allow the PLL to settle),
but the Spec places limits on spread-spectrum clock parameters, so
that PLLs can be designed to track it.  See "Implementation Note:
Spread Spectrum Clocking (SSC)" below Table 7-3 in the Spec.

PLLs are not compatible with 33MHz PCI operation, even before spread-
spectrum clocking, because the clock frequency can be arbitrarily low,
even 0Hz, and no PLL can do that.  Also, nothing in the PCI Spec for
33MHz requires the clock to even be periodic; it could look like a
logic signal whose period changes from cycle to cycle.  Again, PLLs
can't track that.

Spread-spectrum clocking is not limited by the PCI Spec for 33MHz
and below, because the spec already allows the frequency to change
arbitrarily (with few constraints).  With PLLs already out of the
question at 33MHz and below, there is no need to restrict the spread-
spectrum modulation for the sake of PLL tracking.

Unfortunately, all 66MHz plug-in cards have to operate in 33MHz
mode too, without a PLL in that mode.

Andy