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RE: Fw: PCI Clock
Without reviewing it, I expect that the PCI-SIG process does something like
you propose. They have this all covered. The issue is vendors not caring.
Microsoft will not care either I would guess, as they need to support any
and all hardware so they look like the ultimate OS. Although they should
care, since otherwise THEY get blamed for the crashes.
There probably is not a solution short of customers demanding reliable
machines, and most customers are too ... um... unsophisticated to demand
anything. Another driver could be published reviews of compliance or
stability. But who would fund them? And who would read them? Not the
masses that buy PCs from the Sunday paper. The only way I can think of that
headway might be made would be for a major vendor to decide that this was a
good idea and hype it on their box. Others would have to follow suit to
stay in business. I ASSUME that the PCI-SIG logo is sufficient technically.
It could become impossible to gain significant market share without the
logo. Cease-and-desist suits would have to be funded by PCI-SIG members
against violators, as well as audits. The way to start would be for
designed-to-spec cards to make a demonstratable difference and have one
vendor decide to push the issue in an attempt to take over market share.
One marginal design in a big market should do it - honest and undeniable
demos could be created and plastered all over. Open a case of brand X and
see crashes. In every instance install brand Y and see it work reliably.
A big step. Probably never happen. We are doomed to running on marginal
From: JohanHZ@Sycron-IT.com [mailto:JohanHZ@Sycron-IT.com]
Sent: Thursday, April 11, 2002 11:34 AM
Subject: RE: Fw: PCI Clock
Isn't that the task of PCI-SIG :
Verifying if a card (or system, component) is PCI compliant?
Why not giving a particular card vendor a "temporary" Vendor-ID for
developping and testing.
Once the card has been validated at the PCI-SIG workshops, the card can have
its definitive vendor ID.
And why not couple the PCI-SIG compliancy with the Microsoft HCL list (I
know, it's microsoft, but at least microsoft has a HCL list) : if you didn't
pass the workshop, you can't have the microsoft logo.
What's your opinion.
> -----Original Message-----
> From: Clark, Raymond J (WBST) [SMTP:Raymond.Clark@usa.xerox.com]
> Sent: donderdag 11 april 2002 16:45
> To: Venkateshwarlu V; email@example.com
> Cc: firstname.lastname@example.org
> Subject: RE: Fw: PCI Clock
> Anecdotal information regarding cheating on the spec.
> My PC at home had a sound card by a major vendor who was gaining fast on
> leader. The PC randomly crashes, some months alot, some less. I had
> everything. Following the discussion on this subject a few months ago, I
> pulled out all my cards and found (1) The clock trace was too long, (2)
> there were almost NO decoupling caps on the board (perhaps 1 or 2).
> I put in the same model, plug compatable card made by a MORE major vendor
> who bought the first vendor about 2-3 years ago. It was a new PWBA
> and minor changes to other components. It had very few decoupling
> capacitors, but at least you ran out of thumbs counting them (>2). The
> clock trace is closer to being in spec (but still too long), but there is
> series resistor about 1.5 inches up, and a ground trace paired with it.
> There has been a 10x reduction in crashing. Given that my "problem" waxed
> and waned, I cannot be sure that this was the cause. But I am suspicious.
> I wish vendors would follow the spec. Also a few months ago someone
> data on the cost differential for a cheap 4 layer board, I think it was $2
> for a small PCI board. Of course decoupling caps are pretty cheap. I
> gladly pay $5 or $10 more to get something that works vs. something that
> makes my system unreliable. That might add up to another $50 for the
> system, a small price to pay. What good is a computer that crashes all
> time? Vendors could make it a sales point - "Our boards meet the spec,
> don't crash your system like those OTHER guys..."
> My perspective as a frustrated consumer who knows better.
> --Ray Clark
> -----Original Message-----
> From: Venkateshwarlu V [mailto:email@example.com]
> Sent: Thursday, April 11, 2002 4:30 AM
> To: firstname.lastname@example.org
> Cc: email@example.com
> Subject: Re: Fw: PCI Clock
> ** Proprietary **
> PCI spec says SKEW should not be more than 1ns.It is required to provide
> good shielding(guard) for clock to reduce the skew.
> Series Resistor increases the rise time, inturn affects skew.It's
> better to provide end termination resistor(equal to characteristic
> impedance) .
> Experts comments pls.
> Design Engineer(FPGA),
> Larsen & Toubro Limited,
> >>> "dinesh" <firstname.lastname@example.org> 04/11/02 01:56PM >>>
> Putting a serice resistor of appropriate value at a distance of 2.5" may
> help in handling reflection related issues on clock line while extending
> beyond 2.5".
> Any comments on this point from Exp. Group ?
> ----- Original Message -----
> From: arvind v <email@example.com>
> To: <firstname.lastname@example.org>
> Sent: Thursday, April 11, 2002 1:06 PM
> Subject: PCI Clock
> > Hi All,
> > In one of my designs in Processor pmc form factor, I need to run pci
> clock(66MHz) to processor for trace length more than 7 inches (limitation
> the design).
> > As per PCI Specs , on an expansion board I can run only 2.5 inches.
> > What are the implications of this long length , any ideas to over come?
> > Thanks in advance
> > Arvind.
> > See Dave Matthews Band live or win a signed guitar