RE: New PCI card developing

["Austin Franklin" <austin@darkroom.com>]

> I have used the QuickLogic products with great success.  The PCI
> cores are fabricated on the silicon so you don't have any PCI
> place and route issues.  They have a suite of parts from 32bit
> targets through to 64bit master/targets.  They correctly support
> universal card design by using dedicated VIO pins (very rare!),
> and don't have the inherent problem of SRAM configuration (which
> often exceeds the PCI reset period).

Hi Kevin,

I believe you're over characterizing two issues.  One is place and route
with PCI.  As with any FPGA, place and route is an "issue", but the parts
are just so fast now, that place and route "issues" for PCI 33 at least,
aren't really an issue.

The Xilinx core is fully mapped and placed, so at least with that core, this
isn't an issue.  Certainly if one is developing one's own PCI interface, and
depending on the level of FPGA experience, it may be an issue.  I don't
believe this is particular to PCI though, but to FPGA design in general.

Having designed over a dozen FPGA based PCI interfaces, I have never once
run into any issues with "exceed[ing] the PCI reset period".  It certainly
is something to be conscious of, as any good designer should be, and
designing appropriately.

I agree the QuickLogic PCI interface is very nicely done, the biggest
drawback is that the parts are OTP...and costly, certainly during
development.  It's all a matter of tradeoffs...but isn't it always.

Regards,

Austin