RE: New PCI card developing

["Austin Franklin" <darkroom@ix.netcom.com>]

> >The Xilinx core is fully mapped and placed, so at least with that core,
> >this
> >isn't an issue.  Certainly if one is developing one's own PCI interface,
> >and
> >depending on the level of FPGA experience, it may be an issue.  I don't
> >believe this is particular to PCI though, but to FPGA design in general.
> >
>
>
> Having done my own PCI IP core from not knowing anything
> about HDL
> or FPGAs, I can say that understanding what the synthesis tool is
> doing is
> really important.

Hi Kevin,

You are absolutely right, OR...do it in schematics....like the Xilinx PCI
core was done, which makes mapping and placing very very easy ;-)

You can, of course, instantiate the bejesus out of an HDL design...therefore
using the HDL more like a netlister than an HDL...

Austin