RE: New PCI card developing

["Kevin Brace" <kevinbraceusenet@hotmail.com>]

>From: "Austin Franklin" <darkroom@ix.netcom.com>
>To: "PCI SIG Mailing List" <pci-sig@znyx.com>
>Subject: RE: New PCI card developing
>Date: Thu, 25 Apr 2002 21:44:06 -0400
>
>
>Hi Kevin,
>
>You are absolutely right, OR...do it in schematics....like the Xilinx PCI
>core was done, which makes mapping and placing very very easy ;-)
>
>You can, of course, instantiate the bejesus out of an HDL 
>design...therefore
>using the HDL more like a netlister than an HDL...
>
>Austin
>

        Honestly, I cannot imagine myself doing a PCI IP core in schematics 
even if it is for FPGAs.
I guess you can call me a new generation of a lazy engineer who refuses to 
use schematics, and tries to do everything in HDL, but if I used schematics, 
I am sure my PCI IP core will be nowhere near working at this point. (Still 
not fully debugged.)
        Other than keeping the design fairly easy to understand, another 
reason I prefer to stick with HDL is because I can keep my design portable 
across different vendors and nowadays some synthesis tools are free. (i.e., 
XST, LeonardoSpectrum-Altera, and Quartus II native synthesis.)
But I don't believe ViewDraw is free, and although Xilinx and Altera do have 
their own schematic tools, I don't believe schematic data can be ported from 
one to another that easily.
        Looking at the LUTs XST synthesized for some unregistered signal 
paths, I feel like the mapping of LUTs is as good as it will get, and don't 
feel like a schematic tool will do any better.



Kevin Brace (In general, don't respond to me directly, and respond within 
the newsgroup.)

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