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Re: Rules for setting/clearing Memory Access Enable bit of Command Register
It may be so. I only met the behaviour when BIOS does the memory
controller initialization and configuration only at the processor boot
vector (i.e. after INIT, RESET or a wake event) and at this time it
determines the memory size and map and stores this information in
NV RAM. Then, during memory test (at POST) the BIOS code
actually internally invokes INT 15 (E8xx or 8Axx) routines.
Disabling memory accesses at startup does not prevent from the
problem mentioned if DOS driver (for example, DOS-TV program
or SCSI CD-ROM driver) then enables that bit. Also,
CTRL-ALT-DEL behaviour is usually defined in BIOS keyboard
interrupt handler so that either BIOS (older one) jumps to POST
code bypassing most of chip set initialization and there uses saved
memory map or (recent, ACPI-compatible BIOSes) writes
RESET_VALUE into RESET_REG this way emulating system reset.
Also I have seen similar behaviour in very old AWARD BIOS
(do not remember the chip set), where the chip set register was used
to emulate system reset.
----- Original Message -----
From: "Diamant, Nimrod" <email@example.com>
To: "'Alexander Bezrukov'" <firstname.lastname@example.org>; <email@example.com>
Sent: Saturday, 25 May, 2002 10:04
Subject: RE: Rules for setting/clearing Memory Access Enable bit of Command
> One of the reasons the BIOS disables the memory access bit is to avoid
> device access to the memory in DOS like OS, where CTRL-ALT-DEL restarts
> machine, stops the current running applications and running the BIOS
> In this case, the memory might be modified by the BIOS (memory self test)
> while the device is accessing it. Such concurrent use of memory happened
> hang the machine.
> In these kind of environments (DOS) there was no official way to stop the
> (like Windows unloads the drivers). A good way to avoid such hangs is to
> disable the devices' memory access bit.
> Setting this bit, is then the device driver's task.
> -----Original Message-----
> From: Alexander Bezrukov [mailto:firstname.lastname@example.org]
> Sent: Sat, May 25, 2002 7:20 AM
> To: email@example.com
> Subject: Re: Rules for setting/clearing Memory Access Enable bit of
> Command Register
> Hello Daniel,
> > A minority of wintel computers are clearing ( or simply not setting )
> > the memory access enable bit of the command register. As a result
> > my application software fails to communicate with my PCI board's memory.
> > My PCI card's BAR is successfully assigned an address at power up.
> > After that happens I thought that the PCI-BIOS sets the memory access
> > enable bit. Is this the case ?
> All the BIOSes I've seen do set this bit after successful allocation
> of memory addresses region. Anyway, if you have a system in question,
> you can easily prove this (just boot DOS and see what is in the
> command reg).
> > Could the OS be clearing this bit later?
> Yes, Windows writes zero to command register when user selects to
> disable the device. But, as far as I know, OSes do not touch this bit
> during bootup.
> > Can an application program set this bit ?
> PCI diagnostic tools mentioned in several previous postings
> do this somehow. There is some hints in Microsoft KB article
> Q253232. See also the HalGetBusData*(), HalSetBusData*()
> and HalTranslateBusAddress() functions.
> > What are the rules for setting/ clearing this bit ?
> PCI spec. v2.2, table 6-1: this bit "controls a device's response
> to Memory Space accesses. A value of 0 disables the device response.
> A value of 1 allows the device to respond to Memory Space accesses.
> State after RST# is 0."
> > Under what conditions would the OS or the PCI-BIOS clear this bit
> > or fail to set ths bit ?
> Theoretically, there is a (very small) possibility to fail to allocate
> memory resource (several devices in a system might require to be
> mapped in memory below 1MB, for example). In this (very unlikely)
> case BIOS would not allocate memory region(s) for some device(s)
> and not set the memory enable bit(s) accordingly.
> Alexander Bezrukov