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Re: PLX 9080 in 3.3V signaling environment
If you power the 9080 PCI buffers from the 3.3V supply then the PCI
signaling is compatible with both 3.3V and 5V environments. These power
pins (VDDH) must not connect to the PCI Vio lines.
PLX Technology, Inc.
At 09:04 AM 5/28/02, Jim Stevens wrote:
>We have been a long time user of the PLX-9080 in the 5V signaling
>environment. I'm now looking to convert an existing design for use with
>3.3V signaling and would like some feedback from anyone out there that has
>done the same. The 9080 provides separate power pins for the PCI side
>and, according to the specification, may be powered with either 5V or
>3.3V. I'm wondering if it is as simple as connecting these dedicated
>power pins to the PCI Vio lines and we're done? Or, are these any
>sequencing or other issues that other users have run into? After wading
>through the PCI reflector archives in search of 3.3V topics (none with
>regard to the 9080 and 3.3V) I realize that there are a number of
>different ways to get there. It seems to me that having buffers capable
>of either rail and making use of the Vio lines is the way the PCI
>specification intended it to be.
>I am currently working with PLX tech support on this application but I'm
>interested in hearing from any real-world users with regard to the
>9080/3.3V. I plan on doing some testing but my 3.3V motherboard has not
>arrived yet...Thanks in advance for your help.