> OK, now I'm really confused with respect
to the specification. R2.3 pg 146 states Pins labeled
> +3.3 (i/o) and +5(i/o) are special power
pins for defining and driving the PCI signaling rail on the
> Universal add-in card. On the system
board, these pins are connected to the main +3.3V or +5V
> plane, respectively."
That would be confusing. I'm speaking from the point of view
of a chip that interfaces to the PCI bus.
I work with PCI-to-PCI bridges. Their vio pins are not power
pins. They are clamp pins as stated before.
Mike
Phipps
Intel Corp.