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RE: PLX 9080 in 3.3V signaling environment
> OK, now I'm really confused with respect to the specification. ...
The Vi/o pins do indeed carry power, and CAN be used to power (some portion of) the I/O circuits in your IC. They MUST be used for something, however, because these pins are the only way the IC on the "Universal" card can tell whether it is plugged into a 3.3V bus or a 5V bus. Because the positive overshoot clamping must change between a 3.3V bus and a 5V bus, the minimum requirement is that you use Vi/o to somehow affect your clamps.
Vi/o could also power the I/O buffers themselves, which is probably what they originally had in mind at the time the PCI Spec was being written. However, because there is a lot of overlap between the 3.3V and 5V specs, it turns out that it is not too difficult to use the same exact output driver and the same exact input receiver, powered by the same supply voltage (probably 3.3V but not Vi/o), in both environments. If that is done, the only thing that must depend on the bus's 3.3V/5V environment, and therefore on the Vi/o pins, would be the clamping.
Vi/o could actually power the clamps (as in, there is a clamp diode in the IC between every PCI signal pin and Vi/o), but that would necessitate using several Vi/o power pins on the IC to handle the total clamp current and reduce pin inductance and resistance. (Imagine all pins overshooting at the same time...) Some ICs avoid this problem by using alternate clamp designs, where the clamp current doesn't have to flow through the Vi/o pin. But this is an implementation detail within the IC.