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RE: PLX 9080 in 3.3V signaling environment
- To: "PCI-SIG, Mail List" <pci-sig@znyx.com>
- Subject: RE: PLX 9080 in 3.3V signaling environment
- From: "Ingraham, Andrew" <Andrew.Ingraham@hp.com>
- Date: Tue, 4 Jun 2002 13:49:48 -0400
- Resent-Date: Tue, 4 Jun 2002 10:59:55 -0700
- Resent-From: pci-sig@znyx.com
- Resent-Message-ID: <z0b_yD.A.nNC.s7P_8@electra>
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- Thread-Index: AcIHOWE5qdashaNnQSKe96hVVUSGywEs9Qeo
- Thread-Topic: PLX 9080 in 3.3V signaling environment
>The footnotes on pages 114 and 151 mention 5V tolerant parts and state,
>"...such parts are not excluded." It is a device specific implementation.
But the thing to note is the sentence that comes next in each of those footnotes, which says, "high clamp diodes must still be connected to the 'I/O' designated power pins."
When the "I/O" pins (Vi/o) are at 3.3V, meaning that you're plugged into a 3.3V PCI bus, the device can't tolerate 5V levels without a lot of current ... on the order of 70mA per signal pin, minimum.
>Devices that are 5V tolerant are fully PCI compliant and do meet the PCI
>specs.
>The use of such parts does not make your board non-compliant in a 3.3V
>system.
The above is true only if the clamps change with the signaling environment. There must be a connection to the "I/O" pins. When the device is in a 3.3V system, it clamps above 3.3V and is not 5V tolerant anymore. When it is in a 5V system, it is 5V tolerant.
It has also been noted that, contrary to what was implied earlier, the PLX part in question does have a connection to the "I/O" pins, and its clamps do change.
Regards,
Andy