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RE: LVTTL arbiter in PCI

To: "PCI-sig@znyx.com" <pci-sig@znyx.com>
Subject: RE: LVTTL arbiter in PCI
From: "Ingraham, Andrew" <Andrew.Ingraham@hp.com>
Date: Mon, 10 Jun 2002 12:51:39 -0400
Resent-Date: Mon, 10 Jun 2002 09:56:58 -0700
Resent-From: pci-sig@znyx.com
Resent-Message-ID: <CwifNB.A.3f.2mNB9@electra>
Resent-Sender: pci-sig-request@znyx.com
Thread-Index: AcIQmJsmhAcpCRN7T4an8+VduJ0y0wABHupE
Thread-Topic: LVTTL arbiter in PCI

Most "LVTTL" buffers are CMOS.

If you have detailed electrical characteristics of the "LVTTL" pins, or SPICE models that include both best- and worst-case process conditions, you can compare them with the PCI Spec requirements.  It is possible that they do comply.

Also note that the PCI Spec allows the REQ# and GNT# drivers to be half the normal PCI strength which may work in your favor.

The input thresholds on LVTTL are fine for 5V PCI.  If you are doing 3.3V PCI, the data sheet input thresholds for your REQ# pins would be too broad for PCI, on paper, but you might see if the ASIC vendor can guarantee tighter input thresholds that do meet PCI Specs.

Andy

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