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Non registered outputs in PCIX Mode?

To: pci-sig@znyx.com
Subject: Non registered outputs in PCIX Mode?
From: "Parag Birmiwal" <birmiwal@us.ibm.com>
Date: Mon, 24 Jun 2002 20:08:19 -0500
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Does the PCIX (mode 1 or mode 2) require all the outputs MUST BE generated of a flip-flop? That is NO additional logic gates after the flip flop and the chip pin except the boundary scan mux and the I/O driver? Or is it a recommendation to meet the tight timings (Tval(max) = 3.8ns for 133MHz) on the outputs?

Does it really matter if the output is generated of a flip-flop or combinational logic if the timings are met for the PCIX mode?

Regards

Parag Birmiwal
IBM Microelectronics Division -- Austin
Phone: 512-838-6493 Tie Line: 678-6493

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