Re: pci vhdl code/ip core

["Kevin Brace" <kevinbraceusenet@hotmail.com>]

I believe Xilinx had a PCI IP core back in 1994 before LogiCORE PCI written 
in ABEL, VHDL, and Verilog provided as a reference design.
Opencores.org (http://www.opencores.org) also has a PCI IP core written in 
Verilog, but I feel like it will be pretty hard to understand what is going 
on inside the PCI IP core.
After you download both of them, but feel like neither ones are helpful, 
order PCI Specifications and refer to Appendix B of it.
Appendix B gives sample state machine examples of target and initiator.
I did a PCI IP core of my own from scratch, and it did end up resembling 
(Not exact the same, but very similar.) the state machine examples of 
Appendix B.
Also the following article written in VHDL might be helpful, too.

http://www.eedesign.com/editorial/1995/fpgafeature9502.html



Kevin Brace (In general, don't respond to me directly, and respond within 
the mailing list.)



>From: Abraham Thomas <abraham_ktm@yahoo.com>
>To: pci-sig@znyx.com
>Subject: pci vhdl code/ip core
>Date: Sat, 22 Jun 2002 00:32:31 -0700 (PDT)
>
>hi,
>
>im a pg student planning to do my main project related
>to pci.. i would appreciate it if someone could send
>me a vhdl code or something of pci so that i could
>learn things better (my project is in the study phase
>right now) -- it was there in maxlock's site a few
>months back i think but they have taken it off.
>
>pls help me out... by giving relevant links or pls
>mailing me the code if possible...
>
>thnx again,
>abraham
>
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