Dear Group Is there any free Verilog model to verify PCI Implementation Under Test? Such as master model, target model. Thanks in advance. Have a nice day. Chun-Hung Lin ( Engineer ) Airoha Technology Inc. 23 Li-Hsin Road, Hsin-Chu, Taiwan 300 Tel: 886-3-612-8188 #6423 Fax 03-611-8833 E-mail: chunhunglin@airoha.com.tw