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RE: PCI 66MHz 5V Signaling environment?
- To: <firstname.lastname@example.org>
- Subject: RE: PCI 66MHz 5V Signaling environment?
- From: "Ingraham, Andrew" <Andrew.Ingraham@hp.com>
- Date: Thu, 25 Jul 2002 11:22:26 -0400
- Resent-Date: Thu, 25 Jul 2002 08:31:44 -0700
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- Thread-Topic: PCI 66MHz 5V Signaling environment?
> I have to design a PCI motherboard with the Intel21154BE PCI bridge
> on it. The primary PCI bus has to work at 66MHz (64bits) and the
> secondary PCI bus at 33MHz (32bits).
> My problem is that our customer requires for the primary PCI bus a
> signaling environment of 5V (VI/O = +5V, PCI connectors 64bit, 5V).
> This would be against the PCI Local Bus Specification, which says
> that a PCI 66MHz bus uses a +3.3V signaling environment.
That is definitely a no-no. Tell your customer to re-read the specs.
However, there were some motherboards that were built with a 5V, 66MHz
PCI-like bus and connector, and they even called it "PCI." One of
these even came from a very well known motherboard manufacturer that
should have known better. This happened a few years ago and I think
those manufacturers have corrected their mistakes.
> Do you have any idea how the PCI-Bridge chip will behave?
That bridge is pretty versatile. It drives output levels that are
compatible with both 3.3V and 5V PCI, and its input levels are
compatible with both signaling environments.
> Are there any chances for a correct behavior of the system?
Yes, there's a chance. But more importantly, there's a good chance
of having smoke or a fire, depending on what card is plugged into
> I saw that Intel recommends to connect always the P_VIO pin to +5V
> (to avoid some performance problems).
I haven't seen that recommendation, but it seems wrong to me. On a
3.3V PCI bus, it would violate the PCI Spec. Does Intel really
tell people to do that?
> In the document "21154 PCI-to-PCI Bridge Specification Update March
> 2002", page 19, it is written: "P_VIO and S_VIO set the value of
> the voltage clamp only and has no effect on the signaling levels
> of the bus".
That much is true.
Because of the large overlap between 3.3V and 5V electrical specs,
you can have chips that fall within both specs simultaneously ...
except for the overshoot clamp! The clamp has to be set
appropriately in order to be PCI.