RE: FIFO interface to PCI

["Joseph Brcich" <jbrcich@juniper.net>]

Barry

the PLX9030 will most likely handle the data rate. However, the data will need to be moved by the processor thus tying up CPU bandwidth and reducing overall system performance.

I recommend you use a bus master chip. This will free up the CPU to do other task while the video data is transferred.
Regards
Joe
 
-----Original Message-----
From: Faust, Barry [mailto:BFaust@opex.com]
Sent: Friday, July 26, 2002 11:47 AM
To: 'pci-sig@znyx.com'
Subject: FIFO interface to PCI


Hi,

I am designing a PCI board to capture video data from a contact-image-sensor
(CIS) and transfer the data to PC memory. I am planning to use FIFOs to
uninterleave and buffer the data, then start a PCI data transfer. The data
from the CIS is a 10 MByte/sec rate. My question:  is a PCI target chip
(such as PLX 9030) adequate to support this transfer rate? I was originally
going to use a bus-master chip (PLX 9054) but didn't see the need for
another bus master (the PC's PCI bus has a master already.)  Since I am a
newcomer to the PCI world, I don't know the pros and cons of using a slave
(target) chip versus a bus-master chip.

---Barry Faust
   Opex Corp.