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Re: Fwd: Re: FIFO interface to PCI

To: pci-sig@znyx.com
Subject: Re: Fwd: Re: FIFO interface to PCI
From: Marco Brambilla <marco-tpa.brambilla@st.com>
Date: Tue, 30 Jul 2002 11:09:24 +0200
Cc: pci-sig@znyx.com
Organization: STMicroelectronics
References: <3.0.5.32.20020729152823.00e3ddc8@znyx.com>
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That's fine for me.
My comment is correct only if you are designing the silicon.
If you are using an existing pci interface, as the 9054 (which I do not 
know) then you are obviously obliged to comply to its requirements.
Thanks for pointing out.

Ciao, Marco.


> I am afraid that Marco's comment is partially not correct. You must 
> allocate a memory space for your FIFO to be able to build a DMA 
> descriptor for the PLX PCI 9054. The size is irrelevant as long as it is 
> at least the size of the block you want to transfer in single DMA 

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References:
- Fwd: Re: FIFO interface to PCI
  - From: "Vashek Weis" <vashek@ast.co.il> (by way of Daniel Weaver <dan.weaver@znyx.com>)

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