Signal Integrety Problems

["David Peavey" <dpeavey@Kromos.COM>]

Hi
I have an 18 slot backplane.  It appears that the backplane has 2 DEC (now
Intel) 21150 PCI2PCI bridges hanging off the main bus.  Each secondary bus
has 8 slots.  When I load up the whole chassis with my PCI cards (14 total),
I can't get the PCI cards to work.  However when I run with 10 cards, it
run's fine.  I am distributing 5 on each secondary bus.  

I have scanned the archives and am left with the impression that the bus
really can't handle more than 10 loads so with 1 load per connector, plus
the bridge itself, I am left with only 1 card per bus.  However I have been
able to run just fine with 4 or 5 cards.  

Assuming my problem is signal integrety, and I would like to push the upper
limit of "loads per bus", should I design my cards to operate at the high
end of the impedance (60-100 ohm) range, or the low end?  My gut says higher
is better but this contradicts the fact that there is an upper limit on the
trace.  Does anybody know why there is an upper limit on the impedance?
I.E. why not design a 150 ohm or higher trace?

David Peavey
Kromos Communications, Inc.
H/W Engineering Manager
47835 Westinghouse Dr.
Fremont, CA  94539
510-492-4286
510-657-9484 (fax)
dpeavey@kromos.com
www.kromos.com

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