Re: PCI-X questions

["Richard Iachetta" <iachetta@us.ibm.com>]

1) There is no defined behaviour.  It is not something you have to worry
about or design for except if it is an SDD.

2) Nothing is defined.  We choose to put split discard timers of 2^15
clocks (each partial split completion that arrives for a particular
transaction resets the counter for that transaction so that each partial
split has the full 2^15 clocks to arrive).  If the timer expires then an
error is reported via programmable mechanisms and status is stored in a
user defined (i.e. not PCIX architected) register.  If the split completion
finally does arrive after the discard timer has expired, then it is treated
as an unexpected split completion since that transaction is no longer
pending and we are no longer expecting it.

Rich Iachetta
IBM Microelectronics Division -- Austin
System On a Chip / ASIC Development
Phone: 512-838-6305   Tie Line: 678-6305



                                                                                                                                          
                      "Schranz, Rich"                                                                                                     
                      <RSchranz@InfiniC        To:       <pci-sig@znyx.com>                                                               
                      onSys.com>               cc:                                                                                        
                                               Subject:  PCI-X questions                                                                  
                      10/17/02 04:19 PM                                                                                                   
                                                                                                                                          
                                                                                                                                          



2 questions about the PCI-X spec:





      1)       Is there a defined behavior for a target if the initiator
      disconnects a burst at other than an allowable disconnect boundary?


      2)       Is there a defined timeout behavior for a split completion?
      I.e., how long do I have to wait for my data before I give up and how
      do I indicate that I gave up?





Thanks,





Rich Schranz


Staff Hardware Engineer


InfiniCon Systems Inc.


rschranz@infinicon.com


www.infinicon.com


610-233-4843