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Re: PCI-X questions
Nagesh,
Actually, he asked about the opposite case: where the master disconnected
early. In either case though, the bus may hang or recover from that
illegal transaction. I'm not sure which is more likely since the situation
is a don't care condition of the logic.
Rich Iachetta
IBM Microelectronics Division -- Austin
System On a Chip / ASIC Development
Phone: 512-838-6305 Tie Line: 678-6305
"Nagesh K
Vishnumurthy" To: pci-sig@znyx.com
<vnagesh@in.ibm.c cc:
om> Subject: Re: PCI-X questions
10/17/02 10:39 PM
Rich,
I agree with you said that there is no defined behaviour . But the most
likely behaviour is as follows:
1. The target disconnects a burst at other than ADB. but the master is
programmed to put the data till the ADB. So it would not dessert FRAME# or
IRDY# . However, DEVSEL#,TRDY#, STOP# would be deasserted. and the bus
would go into a hang state. The bus would continue in hang state till a
reset is given to the master and it deasserts its signals.
2. If the Slave does not come back with split completion and master has
expired with its internal split discard timer then master may reuse the
Tag at some point of time later. At the transaction at which the tag is
reused a Sequence Error is said to occur. This can be projected as System
error by the glue logic and appropriate action can be taken.
Nagesh
-----------------------------------------------------------------------------------------------
Nagesh K Vishnumurthy,
VLSI Design Engineer, Technology Group, IBM Bangalore .
Tel : 91-80-5094604 Fax: 91-80-5274517
email : vnagesh@in.ibm.com
-----------------------------------------------------------------------------------------------
Everything is OK in the end. If it's not OK, then it's not the end.
"Richard
Iachetta" To: pci-sig@znyx.com
<iachetta@us.ibm. cc:
com> Subject: Re: PCI-X
questions
10/18/2002 04:13
AM
1) There is no defined behaviour. It is not something you have to worry
about or design for except if it is an SDD.
2) Nothing is defined. We choose to put split discard timers of 2^15
clocks (each partial split completion that arrives for a particular
transaction resets the counter for that transaction so that each partial
split has the full 2^15 clocks to arrive). If the timer expires then an
error is reported via programmable mechanisms and status is stored in a
user defined (i.e. not PCIX architected) register. If the split completion
finally does arrive after the discard timer has expired, then it is treated
as an unexpected split completion since that transaction is no longer
pending and we are no longer expecting it.
Rich Iachetta
IBM Microelectronics Division -- Austin
System On a Chip / ASIC Development
Phone: 512-838-6305 Tie Line: 678-6305
"Schranz, Rich"
<RSchranz@InfiniC To: <pci-sig@znyx.com>
onSys.com> cc:
Subject: PCI-X questions
10/17/02 04:19 PM
2 questions about the PCI-X spec:
1) Is there a defined behavior for a target if the initiator
disconnects a burst at other than an allowable disconnect boundary?
2) Is there a defined timeout behavior for a split completion?
I.e., how long do I have to wait for my data before I give up and how
do I indicate that I gave up?
Thanks,
Rich Schranz
Staff Hardware Engineer
InfiniCon Systems Inc.
rschranz@infinicon.com
www.infinicon.com
610-233-4843