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Query Regarding to AD Bus Turnaround Phase
Here I have one query and wish to share with you.
As per the PCIX1.0a standard, FRAME# and AD bus have turnaround phases in
My Master is starting MEM Write Transaction (which is BURST Command) but
with only one DATA PHASE. Thus make trasaction just like DWORD. (Correct me
if i am wrong)
According to standard,
1. For DWORD Transaction, Turnaround phase for AD Bus should be one clock
after FRAME# de asserted.
2. For Mem Write BURST Transaction, Turnaround phase for AD Bus should be
immediately after IRDY# de asserted.
My question is:
What should be the turnaround phase for Mem Write Transaction with only One
Data Phase ? Should we follow point 1 or point 2 ?
Expecting your co-operation,
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