PERR# and SERR#

["Kuriakose, Anand" <Anand.Kuriakose@fci.com>]

Hi experts,

Why are some signals in PCI like TRDY#, IRDY#, FRAME# etc categorised as
Sustained tristate signals? What makes them different?


Why is PERR# a STS (sustained tristate signal) signal, while SERR# an
open-drain signal?

Does the above difference arise due to the fact that 

1)	PERR#  has always a transaction cycle associated with it and SERR#
	is only partially (for address parity errors and data parity errors
in
	special cycle command and for system errors) and
2)	SERR# can be asserted by more than one agent at any time while PERR#
	can be asserted by only one agent (involved in the current
transaction) at
	any time.

Thanks in advance.

Regards,
Anand.