[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: PERR# and SERR#
Hello Anand,
PERR# is a bidirectional signal, any PCI agent can generate it or monitor it.
SERR# is a unidirectional signal connected in a wired-OR logical function.
It may be generated by any PCI agent and the PCI Host (Platform, System
board)) has to monitor it. Not all cheap platforms implement this.
Best regards,
Vashek
========
>From: Kuriakose, Anand <Anand.Kuriakose@fci.com>
>To: pci-sig@znyx.com <pci-sig@znyx.com>
>Subject: PERR# and SERR#
>Date: Sat, 9 Nov 2002 12:11:22 +0530
>
>Hi experts,
>
>Why are some signals in PCI like TRDY#, IRDY#, FRAME# etc categorised as
>Sustained tristate signals? What makes them different?
>
>Why is PERR# a STS (sustained tristate signal) signal, while SERR# an
>open-drain signal?
>
>Does the above difference arise due to the fact that
>
>1) PERR# has always a transaction cycle associated with it and SERR#
> is only partially (for address parity errors and data parity
> errors in
> special cycle command and for system errors) and
>2) SERR# can be asserted by more than one agent at any time while PERR#
> can be asserted by only one agent (involved in the current
> transaction) at
> any time.
>
>Thanks in advance.
>
>Regards,
>Anand.
========
Vashek Weis
Standard Products FAE
Advanced Semiconductor Technology Ltd.
http://www.ast.co.il
mailto:vashek@ast.co.il
_________________________
When everything else fails, read the documentation.
========================================
This footnote confirms that all messages sent out from AST are checked
against Computer Viruses.
Antivirus protection is never 100% safe. Be careful and don't get caught by
Cyber Terrorists...
Report problems to mailto:Postmaster@ast.co.il
========================================
For AST email suppression rules:
http://www.ast.co.il/Documents/EmailRules.txt