Generation of RST# at System Power Down

["Douglas J. Clark" <douglas.j.clark@jpl.nasa.gov>]

Hi-

I'd like to know the typical methods for generation of the PCI signal RST#, 
especially at the time a system is powered down. Section 4.3.2 of the PCI 
Rev. 2.2 spec says that RST# must go active within 500 ns of the power rail 
going out of specification. Is monitoring of the power rail and the 
generation of the RST# signal typically performed by the power supply, or 
by components on the motherboard? Is it done differently for CompactPCI?

Do typical desktop PCs really meet the 500 ns requirement? Can PCI output 
buffers be damaged if RST# takes longer to become active at power-down?

Thanks!

-Doug Clark