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Interrupt Disable bit

To: pci-sig@znyx.com
Subject: Interrupt Disable bit
From: Jim Lindeman <JLindeman@JNI.com>
Date: Thu, 14 Nov 2002 11:43:02 -0800
Resent-Date: Thu, 14 Nov 2002 11:53:36 -0800
Resent-From: pci-sig@znyx.com
Resent-Message-ID: <zlzElB.A.6wF.M6_09@electra>
Resent-Sender: pci-sig-request@znyx.com

Hi,

Does anyone know how the Interrupt Disable bit in the Command register, introduced in PCI 2.3 is intended to be used?

Thanks,

Jim Lindeman
Principal Engineer, ASICs
JNI Corporation
45365 Northport Loop West
Fremont, CA 94538-6417
direct +1.510.360.4714
fax +1.510.252.0123
jlindeman@jni.com
www.jni.com

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